Semiconductor device including buried gate structure

A semiconductor device comprising:

• a first buried gate configured to extend in a first direction;
• a bit-line contact disposed on one side of the first buried gate while being located outside the first buried gate;
• a storage node contact disposed on the other side of the first buried gate in a diagonal direction of the bit-line contact while being located outside the first buried gate;
• and
• a plurality of active regions repeatedly arranged spaced apart from each other by a predetermined distance in the first direction while overlapping with the first buried gate,
• wherein each of the plurality of active regions includes:
• a first extension region configured to extend in a second direction perpendicular to the first direction while overlapping with the bit-line contact;
• a second extension region configured to extend in the second direction while overlapping with the storage node contact;
• and
• a third extension region configured to extend in a diagonal direction while overlapping with the first buried gate.