US 2025/0040220 A1 · HIGH ELECTRON MOBILITY TRANSISTOR AND FABRICATION METHOD THEREOF

Abstract

A high electron mobility transistor includes a semiconductor channel layer and a semiconductor barrier layer disposed on a substrate in sequence. A source electrode and a drain electrode are disposed on the semiconductor channel layer. A semiconductor cap layer is disposed on the semiconductor barrier layer. A first dielectric layer is disposed over the source electrode, the semiconductor cap layer and the drain electrode. A first via passes through the first dielectric layer and is extended downward onto the semiconductor cap layer. A gate electrode is disposed on the first dielectric layer and in contact with the first via. A first field plate is disposed in the first dielectric layer. A second field plate is disposed on the first dielectric layer and in contact with the first field plate.

Claims20

Dependent claims

A high electron mobility transistor, comprising:

a semiconductor channel layer and a semiconductor barrier layer, disposed on a substrate in sequence;
a source electrode and a drain electrode, disposed on the semiconductor channel layer;
a semiconductor cap layer, disposed on the semiconductor barrier layer;
a first dielectric layer, disposed over the source electrode, the semiconductor cap layer and the drain electrode;
a first via, passing through the first dielectric layer and extended downward onto the semiconductor cap layer;
a gate electrode, disposed on the first dielectric layer and in contact with the first via;
a first field plate, disposed in the first dielectric layer;
and
a second field plate, disposed on the first dielectric layer and in contact with the first field plate.

6 more elements

A method of fabricating a high electron mobility transistor, comprising:

provide a substrate;
forming a semiconductor channel layer and a semiconductor barrier layer on the substrate in sequence;
forming a semiconductor cap layer on the semiconductor barrier layer;
forming a source electrode and a drain electrode on the semiconductor channel layer;
forming a first dielectric layer over the source electrode, the semiconductor cap layer and the drain electrode;
forming a first opening in the first dielectric layer;
forming a second opening to pass through the first dielectric layer and be extended downward onto the semiconductor cap layer;
depositing a first metal layer on the first dielectric layer and to fill up the first opening and the second opening to form a first field plate in the first opening and a first via in the second opening;
and
patterning the first metal layer to form a gate electrode in contact with the first via and a second field plate in contact with the first field plate.

7 more elements

Dependencies are inferred from the claim text.

High electron mobility transistor and fabrication method thereof

Life of this patent

High electron mobility transistor and fabrication method thereof

Life of this patent

Abstract

Claims20