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US 2025/0040195 A1Published application
Semiconductor structure
AssigneeUnited Microelectronics Corp.
InventorPo-Yu Yang
Life of this patent
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Abstract
A semiconductor structure includes a substrate, an insulating layer disposed on the substrate, an active layer disposed on the insulating layer and including a device region, and a charge trap layer in the substrate and extending between the insulating layer and the substrate and directly under the device region. The charge trap layer includes a plurality of n-type first doped regions and a plurality of p-type second doped regions alternately arranged and directly in contact with each other to form a plurality of interrupted depletion junctions.
Claims10
A semiconductor structure, comprising:
- a substrate;
- an insulating layer disposed on the substrate;
- an active layer disposed on the insulating layer and comprising a device region;
- and
- a charge trap layer in the substrate and extending between the insulating layer and the substrate and directly under the device region, wherein the charge trap layer comprises a plurality of n-type first doped regions and a plurality of p-type second doped regions alternately arranged and directly in contact with each other to form a plurality of interrupted depletion junctions.
2 more elements
Dependencies are inferred from the claim text.