Control device for a switching voltage regulator and control method

A method of operating a switch circuit, the method comprising:

• receiving, at a first input node of the switch circuit, a first input voltage, wherein a first transistor of the switch circuit includes a first conductive terminal coupled to the first input node;
• receiving, at a second input node of the switch circuit, a second input voltage, the second input voltage being lower than the first input voltage;
• producing, at an output node of the switch circuit, an output voltage switchable between the first input voltage and the second input voltage, wherein a second transistor of the switch circuit includes a first conductive terminal coupled to a second conductive terminal of the first transistor, a second conductive terminal of the second transistor coupled to the output node, wherein a third transistor of the switch circuit includes a first conductive terminal coupled to the second input node, wherein a fourth transistor of the switch circuit includes a first conductive terminal coupled to a second conductive terminal of the third transistor, a second conductive terminal of the fourth transistor coupled to the output node;
• generating, at an output terminal of a first elevator circuit, a first shifted control signal based on a first low-voltage control signal, the output terminal of the first elevator circuit coupled to a control terminal of the first transistor, the first elevator circuit biased between the first input voltage and a shifted ground voltage;
• generating, at an output terminal of a second elevator circuit, a second shifted control signal based on a second low-voltage control signal, the output terminal of the second elevator circuit coupled to a control terminal of the second transistor, the second elevator circuit biased between the output voltage and an elevated ground voltage;
• generating, at an output terminal of a third elevator circuit, a third shifted control signal based on a third low-voltage control signal, the output terminal of the third elevator circuit coupled to a control terminal of the third transistor, the third elevator circuit biased between the second input voltage and a ground voltage;
• and
• generating, at an output terminal of a fourth elevator circuit, a fourth shifted control signal based on a fourth low-voltage control signal, the output terminal of the fourth elevator circuit coupled to a control terminal of the fourth transistor, the fourth elevator circuit biased between the output voltage and the elevated ground voltage.

A switch circuit configured to switch an output voltage at an output terminal of the switch circuit between a first input voltage and a second input voltage, the second input voltage being less than the first input voltage, the switch circuit comprising:

• a first transistor having a source terminal couplable to the first input voltage;
• a second transistor having a source terminal coupled to a drain terminal of the first transistor, a drain terminal of the second transistor coupled to the output terminal of the switch circuit;
• a third transistor having a drain terminal couplable to the second input voltage;
• a fourth transistor having a drain terminal coupled to a source terminal of the third transistor, a source terminal of the fourth transistor coupled to the output terminal of the switch circuit;
• and
• a plurality of elevator circuits, each elevator circuit configured to generate, at its output terminal, a shifted control signal based on a low-voltage control signal,
• wherein a first elevator circuit is biased between the first input voltage and a shifted ground voltage and configured to provide a first shifted control signal to a gate terminal of the first transistor,
• wherein a second elevator circuit is biased between the output voltage and an elevated ground voltage and configured to provide a second shifted control signal to a gate terminal of the second transistor,
• wherein a third elevator circuit is biased between the second input voltage and a ground voltage and configured to provide a third shifted control signal to a gate terminal of the third transistor, and
• wherein a fourth elevator circuit is biased between the output voltage and the elevated ground voltage and configured to provide a fourth shifted control signal to a gate terminal of the fourth transistor.