Multi-Level Controller with Lookup Table

An M-level power converter including:

• (a) an M-level converter cell having one or more fly capacitors coupled to a set of power switches, where M≥3, and configured to generate an output voltage or current from an input voltage;
• (b) a first controller coupled to M-level converter cell and outputting a pulse-width modulation signal in response to at least an output of the M-level converter cell;
• (c) a second controller, coupled to the first controller to receive the pulse-width modulation signal, the M-level controller including:
• (1) a voltage level selector configured to generate and output a first set of address bits;
• (2) a set of one or more analog-to-digital converters, each member of the set configured to be coupled to an associated fly capacitor of the one or more fly capacitors and to output a set of bits indicative of a voltage on the associated fly capacitor in comparison to at least one voltage level, wherein at least a first bit and a second bit of the set of bits corresponding to each of the set of one or more analog-to-digital converters collectively comprises a second set of address bits;
• and
• (3) a look-up table, coupled to the voltage level selector and to the set of one or more analog-to-digital converters, the look-up table storing a set of switch-state selector values and outputting to the M-level power converter cell a selected switch-state selector value in response to receipt of an address comprising a concatenation of the first set of address bits and the second set of address bits.

A method for controlling an M-level power converter cell having one or more fly capacitors coupled to a set of power switches, where M≥3, the method including:

• (a) configuring a voltage level selector to generate and output a first set of address bits;
• (b) generating, for an associated one of the one or more fly capacitors, at least a first bit indicative of whether a voltage on the associated fly capacitor is above or below a reference target level;
• (c) generating, for the associated one of the one or more fly capacitors, at least a second bit indicative of whether the voltage on the associated fly capacitor is within or outside a target window;
• (d) applying the first set of address bits and a collection of the at least first and second bits as a concatenated address to a look-up table, the look-up table storing a set of switch-state selector values and outputting a selected switch-state selector value in response to receipt of the concatenated address;
• (e) generating a set of power switch state settings as a function of a received portion of the selected switch-state selector value;
• and
• (f) applying the generated set of power switch state settings to the power switches of the M-level power converter cell.