Adaptive burst mode control
OwnerAki Li, Desheng Guo +2inventors
InventorsAki Li, Desheng Guo, Chen Jiang, Qing Ye
Life of this patent
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Abstract
In described examples, a device includes a pulse width modulation (PWM) control circuit and a burst mode logic circuit. An input of the burst mode logic circuit is coupled to an output of the PWM control circuit. The burst mode logic circuit is configured to receive a feedback signal from a secondary side of a power conversion circuit. The burst mode logic circuit is configured to suppress a sleep period of a burst mode in response to a magnitude of the feedback signal exceeding a nominal load threshold voltage. The PWM control circuit continues to operate in the burst mode while the burst mode logic circuit suppresses the sleep period.
Claims20
A device comprising:
- a pulse width modulation (PWM) control circuit including an output;
- and
- a burst mode logic circuit including an input and an output, the input of the burst mode logic circuit coupled to the output of the PWM control circuit, and the burst mode logic circuit configured to receive a feedback signal from a secondary side of a power conversion circuit;
- wherein the burst mode logic circuit is configured to suppress a sleep period of a burst mode in response to a magnitude of the feedback signal exceeding a nominal load threshold voltage, while the PWM control circuit continues to operate in the burst mode.
A system comprising:
- a current sensor having an input and an output;
- a pulse width modulation (PWM) control circuit having an input and an output, the input of the PWM control circuit coupled to the output of the current sensor;
- a burst mode logic circuit having a first input, a second input, and an output, the first input of the burst mode logic circuit coupled to the output of the PWM control circuit, and the second input of the burst mode logic circuit coupled to the output of the current sensor;
- a gate driver circuit having an input and an output, the input of the gate driver circuit coupled to the output of the burst mode logic circuit;
- and
- a switch having a first terminal, a second terminal, and a control terminal, the control terminal of the switch coupled to the output of the gate driver circuit;
- wherein the burst mode logic circuit is configured to suppress a sleep period of a burst mode in response to a voltage of the first input of the burst mode logic circuit exceeding a nominal load threshold voltage, while the PWM control circuit continues to operate in the burst mode.
A method of operating a pulse width modulation-controlled (PWM-controlled) system, comprising:
- controlling a switch using a PWM control signal generated by a PWM control circuit operating in a burst mode corresponding to an underloaded condition of the PWM-controlled system, so that burst periods of the PWM control signal alternate with sleep periods of the PWM control signal;
- determining that the PWM-controlled system has transitioned to a normal load condition in response to a feedback signal exceeding a nominal load threshold;
- suppressing the sleep periods of the PWM control signal, while the PWM control circuit continues to operate in the burst mode, in response to the determining that the PWM-controlled system has transitioned to the normal load condition.
Dependencies are inferred from the claim text.