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US 2025/0029967 A1Published application
Stacked semiconductor device with expandable interface and semiconductor package including the same
AssigneeSK hynix Inc.
InventorsKijoon CHANG, Wang Su KIM, Jung Soo PARK
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a package substrate; an interposer disposed over the package substrate; a stacked semiconductor device including a lower chip and one or more upper chips, which are sequentially stacked over the interposer; a first semiconductor chip stacked over the interposer and spaced apart from the stacked semiconductor device, and configured to interface with the lower chip; and one or more second semiconductor chips disposed over the package substrate to interface with the lower chip.
Claims23
A semiconductor package, comprising:
- a package substrate;
- an interposer disposed over the package substrate;
- a stacked semiconductor device including a lower chip and one or more upper chips, which are sequentially stacked over the interposer;
- a first semiconductor chip stacked over the interposer and spaced apart from the stacked semiconductor device, and configured to interface with the lower chip;
- and
- one or more second semiconductor chips disposed over the package substrate to interface with the lower chip.
3 more elements
A stacked semiconductor device, comprising:
- a lower chip;
- and
- one or more upper chips stacked over the lower chip,
- wherein the lower chip includes a first interface circuit to interface with a first semiconductor chip, one or more second interface circuits to interface with one or more second semiconductor chips, and a third interface circuit to interface with the one or more upper chips, and
- wherein the first interface circuit includes:
- a main interface logic configured to transmit first signals for the one or more upper chips between the first semiconductor chip and the third interface circuit;
- and
- one or more sub-interface logics configured to transmit second signals for the one or more second semiconductor chips between the first semiconductor chip and the one or more second interface circuits.
5 more elements
Dependencies are inferred from the claim text.