Wafer stacking process

A wafer stacking process, comprising:

• providing a sacrificial carrier;
• forming a silicon oxide layer on a front side of said sacrificial carrier;
• providing a silicon substrate, wherein through silicon vias (TSVs) are formed in said silicon substrate, and back-end-of-line (BEOL) interconnects and a dielectric layer are provided on a front side of said silicon substrate;
• bonding said silicon oxide layer on said front side of said sacrificial carrier with said dielectric layer on said front side of said silicon substrate;
• performing a thinning process on a back side of said silicon substrate to remove parts of said silicon substrate and expose said TSVs inside, wherein said sacrificial carrier and said silicon substrate after bonding form a wafer bonding unit, and a front side of said wafer bonding unit is provided with exposed said TSVs and a back side of said wafer bonding unit is a back side of said sacrificial carrier;
• bonding said front side of said wafer bonding unit with a front side of another silicon substrate, wherein said TSVs exposed from said front side of said wafer bonding unit are electrically connected with BEOL interconnects on said front side of said another silicon substrate;
• completely removing said sacrificial carrier on said back side of said wafer bonding unit;
• forming a redistribution layer on said dielectric layer of said silicon substrate or on said silicon oxide layer of said sacrificial carrier to connect said BEOL interconnects on said front side of said silicon substrate;
• bonding another wafer bonding unit on said redistribution layer, wherein said redistribution layer is electrically connected with TSVs of said another wafer bonding unit;
• and
• repeating aforementioned said processes of removing sacrificial carrier, forming a redistribution layer and bonding another wafer bonding unit, thereby forming a wafer stacking structure.