Semiconductor package and method of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHYUNSU HWANG, UN-BYOUNG KANG, KUYOUNG KIM, JUMYONG PARK, DONGJOON OH, SANGHOO CHO
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Abstract
Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a substrate, a seed layer on the substrate, and a wiring pad on the seed layer. The wiring pad includes a pad portion, and a capping layer on the seed layer and covering a top surface and a lateral surface of the pad portion. A bottom surface of the pad portion is in contact with a top surface of the seed layer. A width of the top surface of the pad portion is greater than a width of the bottom surface of the pad portion.
Claims20
A semiconductor package, comprising:
- a substrate;
- a seed layer on the substrate;
- and
- a wiring pad on the seed layer,
- wherein the wiring pad includes:
- a pad portion;
- and
- a capping layer on the seed layer and covering the pad portion,
- wherein a bottom surface of the pad portion is in contact with a top surface of the seed layer, and
- wherein a width of a top surface of the pad portion is greater than a width of the bottom surface of the pad portion.
A semiconductor package, comprising:
- a redistribution substrate;
- a semiconductor chip on the redistribution substrate;
- and
- a chip pad on a bottom surface of the semiconductor chip,
- wherein the chip pad includes:
- a first pad portion;
- and
- a first capping layer that covers the first pad portion,
- wherein a bottom surface of the chip pad is in contact with the bottom surface of the semiconductor chip, and
- wherein a width of the bottom surface of the chip pad is less than a width of a top surface of the chip pad.
A method of fabricating a semiconductor package, the method comprising:
- forming a seed layer on a substrate;
- forming on the seed layer a resist layer having an opening that exposes a top surface of the seed layer;
- forming a resist pattern by etching a lateral surface of the resist layer exposed by the opening, wherein a width at an upper portion of the resist pattern is less than a width at a lower portion of the resist pattern;
- forming a plurality of spacer patterns on a lateral surface of the resist pattern exposed by the opening, wherein the spacer patterns expose a central portion of the top surface of the seed layer;
- forming a pad portion on the exposed central portion of the seed layer between an adjacent pair of the plurality of spacer patterns, the pad portion filling a portion of the opening;
- removing the spacer patterns to form a through hole that exposes a lateral surface of the pad portion and a peripheral portion of the top surface of the seed layer;
- and
- forming a capping layer that fills the through hole and covers a top surface and the lateral surface of the pad portion.
Dependencies are inferred from the claim text.