Semiconductor package

A semiconductor package comprising:

• a substrate;
• a semiconductor chip structure that is on the substrate and adjacent to one side surface of the substrate;
• a stiffener that overlaps at least two corner portions of an upper surface of the substrate in a first direction, wherein the stiffener is spaced apart from the semiconductor chip structure, and wherein the stiffener comprises a tetragonal shape that at least partially surrounds the semiconductor chip structure;
• and
• an underfill that overlaps at least a portion of a lower end of the semiconductor chip structure in the first direction.

A semiconductor package comprising:

• a substrate;
• a first semiconductor chip structure and a second semiconductor chip structure that are on an upper surface of the substrate and comprise different sizes;
• a stiffener that is spaced apart from the first semiconductor chip structure and the second semiconductor chip structure and is on the upper surface of the substrate, wherein the stiffener extends along a perimeter of the first semiconductor chip structure and a perimeter of the second semiconductor chip structure;
• and
• an underfill that seals at least a portion of the first semiconductor chip structure and at least a portion of the second semiconductor chip structure,
• wherein the first semiconductor chip structure and the second semiconductor chip structure comprise a plurality of semiconductor chips that extend in a direction that is perpendicular to the upper surface of the substrate.