Semiconductor package

A semiconductor package, comprising:

• a lower redistribution substrate;
• and
• a semiconductor chip mounted on the lower redistribution substrate,
• wherein the lower redistribution substrate includes:
• a lower dielectric structure;
• a first lower redistribution pattern surrounded by the lower dielectric structure;
• a second lower redistribution pattern on the first lower redistribution pattern;
• and
• a lower shield structure surrounded by the lower dielectric structure and surrounding the first lower redistribution pattern and the second lower redistribution pattern,
• wherein the lower shield structure includes a first lower shield pattern and a second lower shield pattern on the first lower shield pattern,
• wherein the first lower shield pattern is at a level the same as a level of the first lower redistribution pattern, and
• wherein the second lower shield pattern is at a level the same as a level of the second lower redistribution pattern.

A semiconductor package, comprising:

• a lower redistribution substrate;
• a first semiconductor chip mounted on the lower redistribution substrate;
• a connection dielectric layer that surrounds the first semiconductor chip;
• a connection conductive structure in the connection dielectric layer;
• an upper redistribution substrate on the connection dielectric layer;
• and
• a second semiconductor chip mounted on the upper redistribution substrate,
• wherein the lower redistribution substrate includes:
• a lower dielectric structure;
• a lower redistribution pattern surrounded by the lower dielectric structure;
• and
• a lower shield structure surrounded by the lower dielectric structure and surrounding the lower redistribution pattern,
• wherein a length of the lower shield structure is greater than a length of the first semiconductor chip.