Enhanced interconnection ball grid array design, semiconductor structure, and fabricating method thereof

A method of forming a semiconductor structure, comprising:

• providing a chip packing structure, comprising:
• attaching at least one chip on a first surface of a substrate, and
• forming a ball grid array on a second surface of the substrate, the ball grid array comprising:
• first solder balls each having a first lateral size, and
• second solder balls each having a second lateral size greater than the first lateral size, wherein the second solder balls are located at corners of the ball grid array, respectively;
• and
• attaching the chip packing structure to a printed circuit board, such that the ball grid array are connected between the chip packing structure and the printed circuit board.

A chip packing structure, comprising:

• a substrate;
• at least one chip attached on a first surface of the substrate;
• a conductive wiring structure embedded in the substrate and electrically connected with the at least one chip;
• and
• an array of ball pads on a second surface of the substrate opposite to the first surface, the array of ball pads comprising:
• first ball pads each having a first area, and
• second ball pads each having a second area greater than the first area, wherein the second ball pads are located at corners of the array of ball pads, respectively.