Semiconductor package and method of manufacturing the same

A semiconductor package, comprising:

• a first redistribution substrate having a multi-layered first redistribution line;
• a semiconductor chip on the first redistribution substrate;
• a sealing material on the first redistribution substrate and over the semiconductor chip;
• a through post on the first redistribution substrate extending into the sealing material and spaced laterally from the semiconductor chip;
• a second redistribution substrate on the sealing material and having at least one second redistribution line;
• and
• an upper package on the second redistribution substrate and electrically connected to the second redistribution substrate through an inter-substrate connection terminal,
• wherein an opening exposing a portion of the multi-layered second redistribution line is on an upper surface of the second redistribution substrate, and
• an uppermost second redistribution line of the at least one second redistribution line exposed through the opening has a multi-metal-layered structure.

A semiconductor package, comprising:

• a first redistribution substrate having a multi-layered first redistribution line;
• a semiconductor chip on the first redistribution substrate;
• a through post on the first redistribution substrate and spaced laterally from the semiconductor chip;
• and
• a second redistribution substrate on the semiconductor chip and the through post and having at least one second redistribution line,
• wherein an opening exposing a portion of the at least one second redistribution line is on an upper surface of the second redistribution substrate, and
• an uppermost second redistribution line of the at least one second redistribution line exposed through the opening comprises a lower metal layer of copper (Cu) and an upper metal layer of nickel (Ni).