Dual via structure for through-chip connections

An integrated circuit device, comprising:

• a substrate having a frontside surface and a backside surface opposite the frontside surface, the substrate having an etched region in the backside surface that extends through the frontside surface;
• at least one dielectric layer disposed over the frontside surface of the substrate, the at least one dielectric layer incorporating a plurality of metal layers;
• a plurality of vias, each of the plurality of vias electrically connected to a top metal layer of the plurality of metal layers and extending through a remaining one or more of the plurality of metal layers and the frontside surface of the substrate;
• and
• a metal structure extending from the backside surface into the substrate, covering the etched region, and contacting the plurality of vias.

A method, comprising:

• providing a substrate;
• forming, over a frontside surface of the substrate, a plurality of metal layers within at least one dielectric layer;
• forming a plurality of vias electrically connected to a top metal layer of the plurality of metal layers and extending through the frontside surface of the substrate;
• etching a region in a backside surface of the substrate opposite the frontside surface, the etched region extending through the frontside surface;
• and
• forming a metal structure over the etched region, the metal structure contacting the plurality of vias.