Integrated circuit structures having through-stack thermal sink for dual-sided devices

An integrated circuit structure, comprising:

• a front side structure comprising:
• a device layer comprising a plurality of nanowire-based transistors;
• and
• a plurality of metallization layers above the plurality of nanowire-based transistors;
• a backside structure below the plurality of nanowire-based transistors;
• a carrier wafer or substrate bonded to the front side structure;
• and
• a thermal conductive via that extends from a location at a bottom of or below the plurality of nanowire-based transistors to a location on or into the carrier wafer or substrate.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a front side structure comprising:
• a device layer comprising a plurality of fin-based or nanowire-based transistors;
• and
• a plurality of metallization layers above the plurality of fin-based or nanowire-based transistors;
• a backside structure below the plurality of fin-based or nanowire-based transistors;
• a carrier wafer or substrate bonded to the front side structure;
• and
• a thermal conductive via that extends from a location at a bottom of or below the plurality of fin-based or nanowire-based transistors to a location on or into the carrier wafer or substrate.