Semiconductor package including thermal interfacial material patterns
AssigneeSamsung Electronics Co., Ltd.
InventorsMyungsam KANG, Chilwoo KWON, Hyejin KIM, Okgyeong PARK
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AssigneeSamsung Electronics Co., Ltd.
InventorsMyungsam KANG, Chilwoo KWON, Hyejin KIM, Okgyeong PARK
Estimating the term…
A semiconductor package includes: a first semiconductor chip disposed on a package substrate; a second semiconductor chip adjacent to the first semiconductor chip in a horizontal direction and disposed on the package substrate; a plurality of first thermal interfacial material patterns overlapping the first semiconductor chip in a vertical direction; a plurality of second thermal interfacial material patterns overlapping the second semiconductor chip in the vertical direction; and a first non-metal thermal conductive layer disposed between the plurality of first thermal interfacial material patterns, wherein the plurality of first thermal interfacial materials are spaced apart from the plurality of second thermal interfacial materials in the horizontal direction, and a thermal conductivity of the first non-metal thermal conductive layer in the horizontal direction is lower than a thermal conductivity of the first non-metal thermal conductive layer in the vertical direction.
A semiconductor package comprising:
A semiconductor package comprising:
A semiconductor comprising:
Dependencies are inferred from the claim text.