Subtractive plug and tab patterning with photobuckets for back end of line (beol) spacer-based interconnects
AssigneeTahoe Research, Ltd.
InventorsKevin LIN, Robert L. BRISTOL, Richard E. SCHENKER
Life of this patent
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AssigneeTahoe Research, Ltd.
InventorsKevin LIN, Robert L. BRISTOL, Richard E. SCHENKER
Estimating the term…
Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnects is described. In an example, a back end of line (BEOL) metallization layer for a semiconductor structure includes an inter-layer dielectric (ILD) layer disposed above a substrate. A plurality of conductive lines is disposed in the ILD layer along a first direction. A conductive tab is disposed in the ILD layer, the conductive tab coupling two of the plurality of conductive lines along a second direction orthogonal to the first direction. A conductive via is coupled to one of the plurality of conductive lines, the conductive via having a via hardmask thereon. An uppermost surface of each of the ILD layer, the plurality of conductive lines, the conductive tab, and the via hardmask is planar with one another.
-25. (canceled)
A method of forming interconnects for a semiconductor structure, comprising:
Dependencies are inferred from the claim text.