Multibit High Density Read Only Memory Using Multiple Reference Biases

A multibit read only memory comprising:

• a plurality of voltage generators for generating a plurality of voltages;
• a transistor having a first node and a second node;
• and
• a connection from the first node to a first supply voltage node wherein the first supply voltage node is biased by one of the voltages in the plurality of voltages, wherein a value of a multibit read only memory cell in the multibit read only memory is stored as a connectivity state of the transistor.

A method comprising:

• providing a plurality of voltage regulators for generating a plurality of voltages for a multibit read only memory;
• connecting a first node of a transistor to a first supply voltage node, wherein the first supply voltage node is biased by one of the voltages in the plurality of voltages, and wherein the transistor is in a multibit read only memory cell of the multibit read only memory;
• and
• connecting a second node of the transistor to a second supply voltage node, wherein the second supply voltage node is biased by one of the voltages in the plurality of voltages;
• whereby a value of the multibit read only memory cell is stored as a conductivity state of the transistor.

A multibit read only memory comprising:

• a plurality of voltage generators for generating a plurality of voltages;
• a transistor having a first node and a second node;
• a connection from the first node to a first supply voltage node wherein the first supply voltage node is biased by one of the voltages in the plurality of voltages;
• and
• a connection from the second node to a second supply voltage node wherein the second supply voltage node is biased by one of the voltages in the plurality of voltages;
• wherein a value of a multibit read only memory cell in the multibit read only memory is stored as a conductivity state of the transistor.