Adaptive programming delay scheme in a memory sub-system
AssigneeMicron Technology, Inc.
InventorsYu-Chung Lien, Zhenming Zhou
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsYu-Chung Lien, Zhenming Zhou
Estimating the term…
A system includes a memory device and a processing device operatively coupled to the memory device. The processing device is to receive a two-pass programming command with respect to a set of memory cells. The processing device is further to determine a value of a metric reflecting a reliability of the set of memory cells. The processing device is further to determine, from a data structure, a delay duration and a subset of the set of memory cells based on the value of the metric. The data structure correlates metric values with respective delay duration values and with respective subsets of memory cells. The processing device is further to perform a two-pass programming operation with respect to the set of memory cells. The two-pass programming operation includes the delay duration between a first pass of the two-pass programming operation and a second pass of the two-pass programming operation.
A system comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
Dependencies are inferred from the claim text.