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US 2025/0029657 A1Published application
Method for Implementing Content-Addressable Memory Based on Ambipolar FET
AssigneePeking University
InventorsRu HUANG, Weikai XU, Jin LUO, Qianqian HUANG
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Abstract
Disclosed is a method for implementing a content addressable memory based on an ambipolar FET, wherein a linear non-separable comparison operation required for a CAM cell is realized based on a single ambipolar FET with a threshold voltage through interposing a memory layer between a gate dielectric layer and a control gate of the ambipolar FET in source/drain symmetry to modulate the threshold voltage for information storage and through utilizing its non-monotonic transfer characteristics for input search.
Claims5
A method for implementing a CAM based on an ambipolar FET, characterized by
- 1) using a semiconductor material with ambipolar conductive characteristics of electrons and holes as a channel, or a metal or metal silicide as a source/drain material, so that the FET with a source/drain-symmetric structure exhibits a non-monotonic ambipolar transfer characteristics;
- 2) interposing a memory layer between a gate dielectric layer and a control gate of the ambipolar FET, wherein the memory layer uses a floating gate/charge trapping layer and a tunneling dielectric layer to modulate a threshold voltage of the transistor through trapping/de-trapping charges in the semiconductor channel, or uses a layer of a ferroelectric material to modulate the threshold voltage of the transistor by switching a polarization state of the ferroelectric material, so that the ambipolar FET with a modulatable threshold voltage, represented as AMFET, is formed;
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- 3) forming the CAM cell with the AMFET obtained in step 2);
- 4) wherein a drain and a gate of the AMFET are used as a ML terminal and a SL terminal of the CAM, respectively, and a source of the AMFET is grounded, wherein in a stage of performing write on the CAM cell to store an entry, the ML terminal is grounded, and programming or erasing voltage pulses are applied to the SL terminal to modulate the threshold voltage of the AMFET by charge trapping/charge de-trapping or ferroelectric polarization switching, so that a translation along a gate voltage is exhibited on a transfer characteristic curve of the device, where the gate voltage corresponding to a minimum drain current is called VOFF, and corresponding VOFF0 and VOFF1 after a programming/erasing operation represent storing of entry 0 and entry 1, respectively;
- and in a searching operation, DC voltage biases of VSL0 and VSL1 are applied, representing inputting of query 0 and query 1, respectively, to the SL terminal and a fixed read voltage is applied to the ML terminal to determine a matching result by detecting a current of the ML terminal, wherein only when the input query is identical to the stored entries, the AMFET is in a turn-off state with a lower drain current, indicating match, and when the input query is not identical to the stored entries, the AMFET is in a turn-on state with a higher drain current, indicating mismatch, then the searching operation and the matching operation of a CAM cell is completed.
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Dependencies are inferred from the claim text.