Performing logical operations in memory
AssigneeMicron Technology, Inc.
InventorsGlen E. Hush, Troy A. Manning, Timothy P. Finkbeiner, Troy D. Larsen, Peter L. Brown
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Abstract
Methods, systems, and devices related to performing logical operations using multiple digit lines. At least two digit lines coupled to the same sense amplifier can be used for the logical operations. For example, two word lines on one digit line and one word line on another digit line can be substantially concurrently activated to perform a particular logical operation. These three word lines are respectively coupled to memory cells configured to store either operands of operation or a reference data value for the particular logical.
Claims20
A method, comprising:
- performing a logical operation on data values respectively stored in a first memory cell and a second memory cell coupled to a first digit line to which a sense amplifier is coupled by:
- activating:
- a first word line coupled to the first memory cell;
- a second word line coupled to the second memory cell;
- and
- a third word line coupled to a third memory cell, wherein the third memory cell is coupled to a second digit line to which the sense amplifier is coupled;
- and
- activating the sense amplifier, wherein a data value sensed at the sense amplifier corresponds to a result of the logical operation.
An apparatus, comprising:
- a first digit line coupled to a first plurality of memory cells, the first plurality of memory cells being coupled to respective first word lines;
- a second digit line coupled to a second plurality of memory cells, the second plurality of memory cells being coupled to respective second word lines;
- a sense amplifier coupled to the first digit line and to the second digit line;
- and
- a controller configured to perform a logical operation on data values stored in at least two of the first plurality of memory cells by:
- activating corresponding first word lines to which the at least two memory cells are coupled;
- activating a corresponding second word line to which a memory cell of the second plurality of memory cells is coupled, wherein the memory cell of the second plurality stores a voltage corresponding to a reference data value;
- and
- activating the sense amplifier to store a result of the logical operation therein.
An apparatus, comprising:
- a memory array comprising:
- a plurality of memory cells coupled to a first digit line;
- a first memory cell coupled to a second digit line and a first word line, the first memory cell configured to store a first reference data value having a first data value;
- a second memory cell coupled to the second digit line and a second word line, the second memory cell configured store a second reference data value having a second data value;
- and
- a sense amplifier coupled to the first and second digit lines;
- and
- a controller is configured to, in order to perform a first logical operation on data values respectively stored in two memory cells of the plurality of memory cells coupled to the first digit line:
- activate two word lines coupled to the two memory cells;
- and
- activate, substantially concurrently with the two word lines being activated, the first word line to further adjust a voltage differential sensed at the sense amplifier based on the first reference data value stored on the first memory cell.
Dependencies are inferred from the claim text.