System on chip (soc) with processor and integrated ferroelectric memory

A data storage device, comprising:

• a controller configured to perform data transfer operations to transfer the user data between a non-volatile memory (NVM) and an external client;
• a local memory accessed by the controller during the data transfer operations, the local memory comprising an array of ferroelectric memory elements (FMEs) characterized as non-volatile, read-destructive semiconductor memory cells having at least one ferroelectric layer, the controller reading data stored in the FMEs and inhibiting a read-refresh operation thereon responsive to a selected condition, the controller and the local memory incorporated into a system on chip (SOC) integrated circuit device;
• a refresh circuit configured to selectively refresh the FMEs in a first mode and to not refresh the FMEs in a second mode responsive to a mode selection signal from a processor circuit.