Memory devices for multiple read operations

A memory device comprising:

• an array of memory cells comprising a plurality of strings of series-connected memory cells;
• a plurality of access lines, each access line of the plurality of access lines connected to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells;
• and
• control logic configured to:
• open the array of memory cells for multiple read operations;
• read first page data from respective memory cells coupled to a first selected access line of the plurality of access lines;
• read second page data from respective memory cells coupled to a second selected access line of the plurality of access lines;
• and
• close the array of memory cells subsequent to reading the first page data and the second page data.

A memory device comprising:

• an array of memory cells comprising a plurality of strings of series-connected memory cells;
• a plurality of access lines, each access line of the plurality of access lines connected to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells;
• a plurality of data lines, each data line of the plurality of data lines connected to a respective subset of strings of series-connected memory cells of the plurality of strings of series-connected memory cells via respective select gates of a plurality of select gates;
• a plurality of select lines, each select line of the plurality of select lines connected to a control gate of a respective select gate of the plurality of select gates for a respective subset of the plurality of select gates;
• and
• control logic configured to:
• open the array of memory cells for multiple read operations;
• bias a first select line of the plurality of select lines to connect via respective select gates of the plurality of select gates each data line of the plurality of data lines to a respective first string of series-connected memory cells of the plurality of strings of series-connected memory cells;
• read first page data from respective memory cells coupled to a first selected access line of the plurality of access lines for the respective first strings of series-connected memory cells;
• and
• read first page data from respective memory cells coupled to a second selected access line of the plurality of access lines for the respective first strings of series-connected memory cells without closing the array of memory cells following the reading of the first page data from the respective memory cells coupled to the first selected access line.