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US 2025/0028933 A1Published application
System, devices and/or processes for executing a neural network architecture search
AssigneeArm Limited
InventorsGerti Tuzi, Dibakar Gope
Life of this patent
Estimating the term…
Abstract
Example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, using one or more computing devices to estimate an execution latency of a candidate neural network in a neural network architecture search (NAS) process.
Claims20
A computer-implemented method comprising:
- computing an estimate of a latency in an execution of a candidate neural network architecture to be implemented on a computing platform, the computing platform comprising a computing device hosting a compiler, the estimate of the latency in the execution of the candidate neural network architecture to be based, at least in part, on:
- a combination of estimated latencies of individual kernels defined in the computing platform and to be executed by the candidate neural network architecture;
- and
- application of an overhead latency estimator to design features of the candidate neural network architecture to determine an overhead latency estimate, wherein the overhead latency estimator comprises trainable parameters determined from measured latencies of execution of sample neural networks on the computing platform.
1 more element
A computing apparatus, comprising:
- one or more memory devices;
- and
- one or more processors coupled to the one or more memory devices to compute an estimate of a latency in an execution of a candidate neural network architecture to be implemented on a computing platform, the computing platform comprising a computing device hosting a compiler, the estimate of the latency in the execution of the candidate neural network architecture to be based, at least in part, on:
- a combination of estimated latencies of individual kernels defined in the computing platform and to be executed by the candidate neural network architecture;
- and
- application of an overhead latency estimator to design features of the candidate neural network architecture to determine an overhead latency estimate, wherein the overhead latency estimator comprises trainable parameters determined from measured latencies of execution of sample neural networks on the computing platform.
3 more elements
An article comprising:
- A storage medium comprising computer-readable instructions stored thereon, the computer-readable instructions to be executable by one or more processors of a computing device to:
- compute an estimate of a latency in an execution of a candidate neural network architecture to be implemented on a computing platform, the computing platform comprising a computing device hosting a compiler, the estimate of the latency in the execution of the candidate neural network architecture to be based, at least in part, on:
- a combination of estimated latencies of individual kernels defined in the computing platform and to be executed by the candidate neural network architecture;
- and
- application of an overhead latency estimator to design features of the candidate neural network architecture to determine an overhead latency, wherein the overhead latency estimator comprises trainable parameters determined from measured latencies of execution of sample neural networks on the computing platform.
2 more elements
Dependencies are inferred from the claim text.