Method and apparatus for an original equipment manufacturer defined scalable and safe memory layout firmware
AssigneeDell Products L.P.
InventorsKarunakar Poosapalli, Shekar Babu Suryanarayana
Life of this patent
Estimating the term…
Loading patent…
AssigneeDell Products L.P.
InventorsKarunakar Poosapalli, Shekar Babu Suryanarayana
Estimating the term…
An information handling system includes a hardware processor, a memory device operatively coupled to a serial peripheral interface (SPI) chip and the hardware processor. The SPI chip interfaces the hardware processor executing plural stages of boot modules during a boot process of the information handling system with allocated, reserved portions of the memory device for each stage of boot module executed in pre-boot, boot, and runtime via a virtual memory interface generated by execution of an original equipment manufacturer (OEM)-defined agnostic memory allocation module. The hardware processor executes the OEM defined agnostic memory allocation firmware to redefine the virtual memory interface for each allocated reserved portion of the memory device at each of the plural stages of the boot modules that are executed from pre-boot, through boot, and to runtime to provide adjustments to allocated, reserved portions of memory for later stages of executed plural stages of the boot modules.
An information handling system comprising:
A method of booting an information handling system, comprising:
An information handling system comprising:
Dependencies are inferred from the claim text.