Atomic operations and histogram operations in a cache pipeline
AssigneeTexas Instruments Incorporated
InventorsNaveen Bhoria, Timothy David Anderson, Pete Michael Hippleheuser
Life of this patent
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Abstract
Methods, apparatus, systems and articles of manufacture to facilitate an atomic operation and/or a histogram operation in cache pipeline are disclosed An example system includes a cache storage coupled to an arithmetic component; and a cache controller coupled to the cache storage, wherein the cache controller is operable to: receive a memory operation that specifies a set of data; retrieve the set of data from the cache storage; utilize the arithmetic component to determine a set of counts of respective values in the set of data; generate a vector representing the set of counts; and provide the vector.
Claims20
A system, comprising:
- a cache memory;
- and
- a cache controller coupled to the cache memory and configured to:
- receive a histogram operation that specifies a set of data;
- read the set of data from the cache memory;
- and
- cause an arithmetic circuit to generate a vector representing a histogram of the set of data,
- wherein to generate the vector, the arithmetic circuit is configured to:
- initiate elements of the vector each of which corresponds to a value in the set of data;
- and
- increment an element of the vector based on occurrence of a corresponding value in the set of data.
A method, comprising:
- receiving a histogram operation that specifies a set of data;
- based on the histogram operation:
- reading the set of data from a cache memory;
- and
- generating, by an arithmetic circuit of the cache memory, a vector representing a histogram of the set of data, which includes:
- initiating, by the arithmetic circuit, elements of the vector each of which corresponds to a value in the set of data;
- and
- incrementing, by the arithmetic circuit, an element of the vector based on occurrence of a corresponding value in the set of data;
- and
- providing the vector including the incremented element to a processor.
Dependencies are inferred from the claim text.