Adaptive hardware tracing
AssigneeSynopsys, Inc.
InventorAarati Kalpesh Mehta
Life of this patent
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AssigneeSynopsys, Inc.
InventorAarati Kalpesh Mehta
Estimating the term…
An adaptive hardware trace circuit is presented. The adaptive hardware trace circuit may include one or more trace circuits, a trace port funnel circuit, a trace FIFO buffer, and an adaptation logic circuit. Each trace circuit may be coupled to a processor core and configured to monitor and encode trace data generated by a processor core. The trace buffer may be configured to store the trace data generated by the processor cores. The adaptation circuit may be configured to receive, from a user, one or more buffer capacity thresholds and a priority level assigned to each trace. The adaptation circuit may map ranges of trace buffer capacities to corresponding sets of actions. The adaptation circuit may detect a buffer capacity to determine a set of one or more actions associated with the buffer capacity and execute the set of one or more actions.
A circuit, comprising:
A computer-implemented method, comprising:
A non-transitory computer-readable medium comprising stored instructions that, when executed by one or more processors, cause the one or more processors to:
Dependencies are inferred from the claim text.