Techniques for controlling vector processing operations

A method of operating a processing apparatus comprising processing circuitry comprising a plurality of processing lanes, the method comprising:

• generating control signals in response to an instruction;
• performing, in response to the control signals, a vector processing operation using the processing circuitry in each processing lane of the plurality of processing lanes for which a per-lane mask indicates that processing for that processing lane is enabled;
• and monitoring each processing lane of the plurality of processing lanes for each instruction of a plurality of instructions performed in the plurality of processing lanes and to modify the per-lane mask for a processing lane of the plurality of processing lanes in response to a processing state of the processing lane meeting one or more predetermined conditions.

A non-transitory computer-readable medium to store computer-readable code for fabrication of a processing apparatus comprising:

• decoder circuitry configured, in response to an instruction, to generate control signals;
• processing circuitry comprising a plurality of processing lanes, wherein the processing circuitry is configured, in response to the control signals, to perform a vector processing operation in each processing lane of the plurality of processing lanes for which a per-lane mask indicates that processing for that processing lane is enabled;
• and control circuitry to monitor each processing lane of the plurality of processing lanes for each instruction of a plurality of instructions performed in the plurality of processing lanes and to modify the per-lane mask for a processing lane of the plurality of processing lanes in response to a processing state of the processing lane meeting one or more predetermined conditions.