Apparatus, system, and method of compiling code for a processor

A product comprising one or more tangible computer-readable non-transitory storage media comprising computer-executable instructions operable to, when executed by at least one processor, enable the at least one processor to cause a compiler to:

• identify a first plurality of instructions based on a source code to be compiled into a target code to be executed by a target processor;
• determine, based on the first plurality of instructions, an instruction to Arithmetic Logic Unit (ALU) (instruction-ALU) allocation to allocate a second plurality of instructions to a plurality of ALUs of the target processor, wherein the second plurality of instructions is based on the first plurality of instructions, wherein the instruction-ALU allocation is based on one or more conversion rules corresponding to one or more respective sets of instruction types, wherein a conversion rule corresponding a set of instruction types defines a conversion between at least first and second instruction types, which are executable by at least first and second respective ALUs of the plurality of ALUs;
• and
• generate the target code based on compilation of the source code, wherein the target code is based on the second plurality of instructions allocated to the plurality of ALUs.

A computing system comprising:

• at least one memory to store computer-executable instructions;
• and
• at least one processor to retrieve the computer-executable instructions from the memory and to execute the computer-executable instructions to cause the computing system to:
• identify a first plurality of instructions based on a source code to be compiled into a target code to be executed by a target processor;
• determine, based on the first plurality of instructions, an instruction to Arithmetic Logic Unit (ALU) (instruction-ALU) allocation to allocate a second plurality of instructions to a plurality of ALUs of the target processor, wherein the second plurality of instructions is based on the first plurality of instructions, wherein the instruction-ALU allocation is based on one or more conversion rules corresponding to one or more respective sets of instruction types, wherein a conversion rule corresponding a set of instruction types defines a conversion between at least first and second instruction types, which are executable by at least first and second respective ALUs of the plurality of ALUs;
• and
• generate the target code based on compilation of the source code, wherein the target code is based on the second plurality of instructions allocated to the plurality of ALUs.