Self-Characterizing, Evaluating, and Adaptive High Performance Memory Controller

A computing device, comprising:

• a memory subsystem;
• and
• a processor coupled to the memory subsystem and configured to:
• monitor memory access events;
• determine adjustments to operational parameters of the memory subsystem to improve efficiency based on operational parameters of the memory subsystem, memory access events, and associated timings;
• and
• adjust the operational parameters of the memory subsystem based on the determined adjustments.

A computing device, comprising:

• a memory subsystem;
• means for monitoring the memory subsystem to detect memory access events;
• means for determining timings associated with detected memory access events based on start and end times of detected memory access events;
• means for determining an efficiency of the memory subsystem based on operational parameters of the memory subsystem, the detecting memory access events, and associated timings;
• means for determining adjustments to the operational parameters based on the determined efficiency;
• means for adjusting the operational parameters of the memory subsystem based on the determined adjustments;
• and
• means for dynamically modifying operations of the memory subsystem based on the adjusted operational parameters.

A non-transitory processor-readable medium having stored thereon processor-executable instructions configure to cause a processor of a computing device to perform operations comprising:

• monitoring a memory subsystem to detect memory access events;
• determining timings associated with detected memory access events based on start and end times of detected memory access events;
• determining an efficiency of the memory subsystem based on operational parameters of the memory subsystem, the detecting memory access events, and associated timings;
• determining adjustments to the operational parameters based on the determined efficiency;
• adjusting the operational parameters of the memory subsystem based on the determined adjustments;
• and
• dynamically modifying operations of the memory subsystem based on the adjusted operational parameters.