US 2025/0028341 A1 · VOLTAGE DETECTOR IN DATA COMMUNICATION INTERFACE

Abstract

Aspects relate to mechanisms for detecting a voltage level on a data communication interface between a slave device and a host device. Based on the detected voltage level, the slave device may respond to the host device on the data communication interface at the detected voltage level. In some examples, the slave device may include a circuit configured to toggle between a first voltage level and a second voltage level to provide one of the first voltage level or the second voltage level corresponding to the detected voltage level on the data communication interface.

Claims28

Dependent claims

An apparatus, comprising:

a clock line voltage detector configured to detect a voltage level of a clock signal sent by a host device on a clock line of a data communication interface between the apparatus and the host device;
and
a circuit configured to provide an output voltage on the data communication interface, the output voltage being at one of a first voltage level or a second voltage level corresponding to the detected voltage level.

Dependencies are inferred from the claim text.

Facts

Application

18/498,927Filed 31 Oct 2023

Priority

17 Jul 2023

Published

23 Jan 2025

Term ends

Not estimatedThe source records don’t support an estimate.

Classification18 codes

G05F 1/56
Wherein the variable actually regulated by the final control device is DC: using semiconductor devices in series with the load as final control…
G06F 1/10
Generating or distributing clock signals or signals derived directly therefrom: distribution of clock signals , e.g. skew
G06F 13/4282
Bus transfer protocol, e.g. handshake; Synchronisation: on a serial bus, e.g. I2C bus, SPI bus
G06F 13/4291
On a serial bus, e.g. I2C bus, SPI bus: using a clocked protocol

Voltage detector in data communication interface

Life of this patent

Voltage detector in data communication interface

Life of this patent

Abstract

Claims28