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US 2025/0023568 A1Published application
Level shifter circuit
AssigneeNXP USA, Inc.
InventorWeiting Lin
Life of this patent
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Abstract
One example discloses a level shifter circuit, including: an input port configured to receive an input signal (IN); an output port configured to transmit an output signal (OUT); a delay circuit coupled to generate a delayed input signal (IN_DLY) from the input signal (IN); a pulse generator coupled to the delay circuit and configured to generate a pulse signal from a combination of the input signal and the delayed input signal; and a latch circuit coupled to the pulse generator and configured to generate and hold a state of the output signal in response to the pulse signal.
Claims19
A level shifter circuit, comprising:
- an input port configured to receive an input signal (IN);
- an output port configured to transmit an output signal (OUT);
- a delay circuit coupled to generate a delayed input signal (IN_DLY) from the input signal (IN);
- a pulse generator coupled to the delay circuit and configured to generate a pulse signal from a combination of the input signal and the delayed input signal;
- and
- a latch circuit coupled to the pulse generator and configured to generate and hold a state of the output signal in response to the pulse signal.
3 more elements
Dependencies are inferred from the claim text.