Circuit for voltage offset compensation
AssigneeSTMicroelectronics International N.V.
InventorVratislav Michal
Life of this patent
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Abstract
A circuit includes a current source, a differential pair of transistors coupled to the current source, an active load, and a current injection circuit. The differential pair of transistors has a first offset voltage and an input transconductance. The current injection circuit is configured to supply a first current and a second current to produce a second offset voltage across the differential pair of transistors opposite the first offset voltage. The first current and the second current has a same thermal dependence as the input transconductance of the differential pair of transistors.
Claims21
1-13. (canceled)
A circuit comprising:
- a differential pair, the differential pair comprising a first transistor and a second transistor, the first transistor and the second transistor being coupled through a first resistance;
- a first programmable current source coupled to a first node between the first transistor and the first resistance;
- a second programmable current source coupled to a second node between the second transistor and the first resistance;
- and
- a first bias current source coupled to the differential pair.
A circuit comprising:
- a differential pair, the differential pair comprising a first transistor and a second transistor, the first transistor and the second transistor being coupled through a first resistance;
- a first programmable current source coupled to a first node between the first transistor and the first resistance;
- a second programmable current source coupled to a second node between the second transistor and the first resistance;
- a first bias current source coupled to the first node;
- and
- a second bias current source coupled to the second node.
A circuit comprising:
- a differential pair, the differential pair comprising a first transistor and a second transistor, the first transistor and the second transistor being coupled through a first resistance;
- a first programmable current source coupled to a first node between the first transistor and the first resistance;
- a second programmable current source coupled to a second node between the second transistor and the first resistance;
- an active load, the active load being coupled to the first transistor and the second transistor opposite the first programmable current source and the second programmable current source;
- a first bias current source coupled to the first node;
- and
- a second bias current source coupled to the second node.
Dependencies are inferred from the claim text.