Architecture for reduction of rf interference on clock circuits

An apparatus comprising:

• a low-pass filter circuit, the low-pass filtering circuit to receive a sinusoidal signal;
• a first digital signal generator coupled to an output terminal of the low-pass filter circuit, the first digital signal generator to generate a first digital clock signal based a differential signal corresponding to the sinusoidal signal;
• a second digital signal generator coupled to an input terminal of the first digital signal generator, the second digital signal generator to generate a second digital clock signal based on a non-differential signal corresponding to the differential signal;
• and
• a radio frequency interference (RFI) detection circuit coupled to the first digital signal generator and the second digital signal generator, the RFI detection circuit to detect RFI associated with the non-differential signal.

A method comprising:

• generating a sinusoidal signal, the sinusoidal signal comprising a differential signal;
• generating a non-differential signal based on the differential signal;
• detecting radio frequency interference (RFI) associated with the non-differential signal;
• enabling one of a first digital signal generator or a second digital signal generator based on the RFI;
• generating a first digital clock signal based on the differential signal, when the first digital signal generator is enabled;
• and
• generating a second digital clock signal based on the non-differential signal, when the second digital signal generator is enabled.