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US 2024/0407272 A1Published application
Electronic device
AssigneeSTMicroelectronics International N.V.
InventorsPhilippe BOIVIN, Simon JEANNOT
Life of this patent
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Abstract
A device includes a phase change memory cell. The memory cell includes a first stack of layers including an intermediate layer of phase change material, a lower insulating layer and an upper insulating layer. The memory cell includes L-shaped first and second conductive elements. The first conductive element extends on a first side wall of the first stack. The second conductive element extends on the second side wall of the stack opposite to the first wall.
Claims20
A device, comprising:
- a first phase change memory cell including:
- a first stack of layers including a lower insulating layer, an upper insulating layer, and an intermediate layer of phase change material between the lower insulating layer and the upper insulating layer;
- and
- a first L-shaped first conductive element extending on a first side wall of the first stack;
- and
- a second L-shaped conductive element extending on a second side wall of the first stack opposite to the first side wall, wherein the layer of phase change material is configured so that at least portion of the layer of phase change layer is configured to change between an amorphous state and a crystalline state to determine a stored data value of the first phase change memory cell.
3 more elements
A method, comprising:
- forming a first stack of layers of a first phase change memory cell of a device, the first stack including an intermediate layer of phase change material between a lower insulating layer and an upper insulating layer;
- forming a first L-shaped conductive element extending on a first side wall of the first stack;
- and
- forming a second conductive element extending on a second side wall of the first stack opposite to the first wall, wherein the layer of phase change material is configured so that at least portion of the layer of phase change layer is configured to change between an amorphous state and a crystalline state to determine a stored data value of the first phase change memory cell.
1 more element
A device, comprising:
- an interconnection network including a lower interconnection level and an upper interconnection level;
- a first phase change memory cell between the lower interconnection level and the upper interconnection level including:
- a first lower insulating layer on the lower interconnection level;
- a first L-shaped conductive element on a first sidewall of the first lower insulating layer and on a top surface of a first conductive interconnection element in the lower interconnection level;
- and
- a second L-shaped conductive element on a second sidewall of the first lower insulating layer;
- a second phase change memory cell including:
- a second lower insulating layer on the lower interconnection level;
- a third L-shaped conductive element on a first sidewall of the first lower insulating layer and on a top surface of a second conductive interconnection element in the lower interconnection level;
- and
- a fourth L-shaped conductive element on a second sidewall of the first lower insulating layer;
- and
- a layer of phase change material on a top surface of the first lower insulating layer, on a top surface of the second lower insulating layer, and extending unbroken between the first and second lower insulating layers, and in contact with a top surface of the first conductive element and with a top surface of the third conductive element.
10 more elements
Dependencies are inferred from the claim text.