Display device

A display device, comprising:

• a substrate;
• a display region provided on the substrate;
• and a picture-frame region provided on the substrate and disposed outside the display region, the display region including a plurality of subpixels and a subpixel drive circuit included in each of the plurality of subpixels,
• wherein the picture-frame region includes:
• a first gate-clock-signal trunk wire;
• a second gate-clock-signal trunk wire supplied with a clock signal different from a clock signal supplied to the first gate-clock-signal trunk wire;
• a first constant-voltage trunk wire and;
• a second constant-voltage trunk wire supplied with a constant voltage higher than a constant voltage supplied to the first constant-voltage trunk wire, all of which are provided along the picture-frame region;
• a unit circuit provided with a transistor including a first oxide semiconductor layer, a first gate electrode, a first source electrode, and a first drain electrode, the unit circuit being configured to output at least one or more output signals to the subpixel drive circuit of a corresponding subpixel included in the plurality of subpixels, and the at least one or more output signals being output in accordance with a first gate clock signal from the first gate-clock-signal trunk wire, a second gate clock signal from the second gate-clock-signal trunk wire, a first constant voltage from the first constant-voltage trunk wire, a second constant voltage from the second constant-voltage trunk wire, and a set signal;
• a first unit circuit block provided along a section of a region in which the first gate-clock-signal trunk wire, the second gate-clock-signal trunk wire, the first constant-voltage trunk wire, and the second constant-voltage trunk wire extend, the first unit circuit block including a plurality of the unit circuits arranged side by side in a first direction of the substrate;
• a second unit circuit block provided along another section of the region in which the first gate-clock-signal trunk wire, the second gate-clock-signal trunk wire, the first constant-voltage trunk wire, and the second constant-voltage trunk wire extend, the second unit circuit block including the plurality of unit circuits arranged side by side in a second direction of the substrate, and the second direction being not in parallel with the first direction;
• and
• a trunk wire forming region provided between the first unit circuit block and the second unit circuit block, and including the first gate-clock-signal trunk wire, the second gate-clock-signal trunk wire, the first constant-voltage trunk wire, and the second constant-voltage trunk wire,
• the trunk line forming region is provided with a set signal line supplied with the set signal sent from a unit circuit included in the plurality of unit circuits in the first unit circuit block and provided closest to the second unit circuit block to a unit circuit included in the plurality of unit circuits in the second unit circuit block and provided closest to the first unit circuit block, and
• the trunk line forming region is provided with one or more dummy elements each including:
• a second oxide semiconductor layer formed of a same material as a material of the first oxide semiconductor layer;
• and a second gate electrode formed of a same material as a material of the first gate electrode overlapping with the second oxide semiconductor layer in plan view.