US 2024/0406602 A1Published application

Imaging device and electronic apparatus

AssigneeSony Semiconductor Solutions Corporation

InventorsDAIKI SAKUMA, SHINICHIROU ETOU

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Abstract

[Object] Provided is an imaging device that can improve a decrease in image quality caused by the offset of a successive approximation register analog-to-digital converter. [Solving Means] The imaging device of the present disclosure includes a pixel, and a successive approximation register analog-to-digital converter. The successive approximation register analog-to-digital converter includes a preamplifier, and a comparator. The preamplifier includes a first input transistor, a second input transistor, an auto-zero switch element configured to reset gate potentials of the first input transistor and the second input transistor before initial digital conversion processing, a cancel capacitor configured to charge a charge corresponding to an offset during resetting of the first input transistor and the second input transistor, a feedback capacitor configured to make, during comparison by the comparator, a gain of the preamplifier larger than the gain during the resetting, and a reset switch element configured to reset potentials of the pair of output terminals every time the comparison by the comparator is completed.

Claims12

Dependent claims

An imaging device comprising:

a pixel configured to photoelectrically convert incident light;
and
a successive approximation register analog-to-digital converter configured to perform digital conversion processing a plurality of times on an analog signal generated on a basis of photoelectric conversion by the pixel, wherein
the successive approximation register analog-to-digital converter includes
a preamplifier configured to amplify a voltage input to each of an inverting input terminal and a non-inverting input terminal, and
a comparator configured to compare voltages input from respective ones of a pair of output terminals of the preamplifier to each other, and
the preamplifier includes
a first input transistor having a gate connected to the inverting input terminal,
a second input transistor having a gate connected to the non-inverting input terminal,
an auto-zero switch element configured to reset gate potentials of the first input transistor and the second input transistor before initial digital conversion processing,
a cancel capacitor configured to charge a charge corresponding to an offset during resetting of the first input transistor and the second input transistor,
a feedback capacitor configured to make, during comparison by the comparator, a gain of the preamplifier larger than the gain during the resetting, and
a reset switch element configured to reset potentials of the pair of output terminals every time the comparison by the comparator is completed.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/700,374Filed 6 Sep 2022
Priority: JP 2021-17177320 Oct 2021
Published: 5 Dec 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H04N 25/772
Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components: comprising A/D, V/T, V/F, I/T or I/F…
H04N 25/67
Noise processing, e.g. detecting, correcting, reducing or removing noise: applied to fixed-pattern noise, e.g. non-uniformity of response
H04N 25/75
Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors: circuitry for providing, modifying or processing…
H04N 25/78
Addressed sensors, e.g. MOS or CMOS sensors: readout circuits for addressed sensors, e.g. output amplifiers or A/D converters