Timing determination apapratus

A timing determination apparatus comprising:

• a communication unit configured to acquire output data sets being data sets transmitted from respective hardware devices, each of the hardware devices having a cycle counter configured to be incremented each time a predetermined period has elapsed, each of the hardware devices configured to transmit a data set including an output cycle counter value being a value of the cycle counter at a time of transmitting the data set, the communication unit being connected to each of the hardware devices;
• a transfer circuit being a digital logic circuit and connected to the communication unit, the transfer circuit having a master counter configured to be incremented each time the predetermined period has elapsed, the transfer circuit configured to
• acquire output data sets being data sets transmitted from respective hardware devices via the communication unit, each of the hardware devices having a cycle counter configured to be incremented each time a predetermined period has elapsed, each of the hardware devices configured to transmit a data set including an output cycle counter value being a value of the cycle counter at a time of transmitting the data set,
• calculate a difference value for each of the output data sets in a case where the communication unit acquires the output data sets at same timing, the difference value being a difference between the output cycle counter value and an identical master counter value, the identical master counter value being a value of the master counter and indicating the same timing, the output cycle counter value being included in each of the output data sets,
• set the difference value calculated by the transfer circuit as a reference difference value for each of the hardware devices,
• determine whether the hardware devices satisfy a preset matching determination condition after the transfer circuit sets the reference difference value for each of the hardware devices, the preset matching determination condition being a condition in which a difference value calculated by the transfer circuit matches the reference difference value, and
• determine that the hardware devices do not transmit the data sets at same time point in a case where the transfer circuit determines that at least one of the hardware devices does not satisfy the preset matching determination condition.