Integrated circuit with pattern overlay for assisting overlay signal and accuracy
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPei-Sheng TANG, Chen-Yen KAO, Jheng-Syun YANG
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Abstract
An integrated circuit includes a device region and an overlay mark region. The device region includes a plurality of stacked channels of a transistor, a source/drain region of the transistor, a source/drain contact of a first material on the source/drain region, and a conductive via of a second material in contact with the source/drain contact. The overlay mark region includes a first diffraction grating of first metal structures of the first material and a second first diffraction grating of second metal structures above of the second material above and offset from the first metal structures.
Claims20
A method comprising:
- forming, in a device region of an integrated circuit, a transistor including a plurality of stacked channels and a source/drain region;
- forming, in the device region with a first deposition process, a source/drain contact on the source/drain region;
- forming, in the device region with a second deposition process, a conductive via in contact with the source/drain contact;
- forming, in an overlay mark region of the integrated circuit, a first diffraction grating of first metal structures with the first deposition process;
- and
- forming, in the overlay mark region with the second deposition process, a second diffraction grating of second metal structures above and laterally offset from the first metal structures.
An integrated circuit, comprising:
- a device region including:
- a plurality of stacked channels of a transistor;
- a source/drain region of the transistor;
- a source/drain contact of a first material on the source/drain region;
- and
- a conductive via of a second material in contact with the source/drain contact;
- an overlay mark region including:
- a first diffraction grating of first metal structures of the first material;
- and
- a second diffraction grating of second metal structures above of the second material above and offset from the first metal structures.
An integrated circuit, comprising:
- a substrate;
- and
- an overlay mark region including:
- a plurality of semiconductor fins on the substrate;
- a first diffraction grating of first metal structures above and aligned with the semiconductor fins;
- and
- a second diffraction grating of second metal structures above and laterally offset from the first diffraction grating.
Dependencies are inferred from the claim text.