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US 2024/0405099 A1Published application
Optimized fin height for finfet transistor and method of fabricating thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Hao WU, Sheng-Fu YU
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Abstract
Method and devices that include a recessed isolation region in a trench region formed by the removal of a dummy gate structure. The recessed isolation region can allow a greater fin height in the channel region. A metal gate structure may be formed on the recessed isolation region and fin.
Claims20
A method, comprising:
- forming a first semiconductor structure extending from a substrate in a first direction, wherein the first semiconductor structure has a height along the first direction and the first semiconductor structure extends lengthwise along a second direction that is different than the first direction;
- forming a second semiconductor structure that extends from the substrate in the first direction, wherein the second semiconductor structure extends lengthwise along the second direction;
- forming an isolation structure over the substrate and extending between the first semiconductor structure and the second semiconductor structure in a third direction that is different than the second direction;
- forming a dummy gate structure on the substrate over the first semiconductor structure and the isolation structure, wherein the dummy gate structure extends lengthwise along the third direction;
- removing the dummy gate structure to form a trench exposing an upper surface of the isolation structure;
- etching the isolation structure exposed in the trench to recess the isolation structure;
- and
- after etching the isolation structure, forming a metal gate structure in the trench and on the recessed isolation structure.
5 more elements
A method, comprising:
- forming a first fin and a second fin that extend above a substrate;
- forming an isolation region between the first fin and the second fin, wherein the first fin and second fin have a first fin height above the isolation region;
- forming a gate stack over the first fin, the second fin, and the isolation region;
- growing an epitaxial source/drain feature in a source/drain region of the first fin;
- after the growing, removing the gate stack to form a trench;
- and
- selectively etching the isolation region within the trench between the first fin and the second fin, wherein after the selectively etching the first fin has a second fin height above the isolation region within the trench, the second fin height greater than the first fin height.
4 more elements
A device comprising:
- a first semiconductor structure and a second semiconductor structure each extending above a substrate in a first direction and having a length extending in a second direction;
- an isolation structure extending between a bottom portion of the first semiconductor structure and a bottom portion of the second semiconductor structure
- a first metal gate structure disposed over a channel region of an upper portion of the first semiconductor structure and a channel region of an upper portion of the second semiconductor structure, wherein the first metal gate structure extends lengthwise along a third direction;
- an interlayer dielectric layer disposed over the isolation structure and adjacent the first metal gate structure;
- and
- wherein the isolation structure has a first thickness under the first metal gate structure and a second thickness under the interlayer dielectric layer, wherein the first thickness is less than the second thickness.
3 more elements
Dependencies are inferred from the claim text.