Tri-gate Pixel Structure, Array Substrate, and Display Panel
AssigneeGuangzhou China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorsShuaichen SI, Lu YANG
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Abstract
Embodiments of the present disclosure are directed to a pixel structure, an array substrate, and a display panel. The pixel structure comprises a plurality of gate lines arranged horizontally parallel and a plurality of data lines arranged vertically parallel, with the gate lines and the data lines vertically intersecting to form a plurality of sub pixel areas. The present disclosure improves the uniformity of the display panel image by adding new electrode lines and arranging them parallel to the fewer data lines in the pixel structure while ensuring the pixel opening rate.
Claims17
A tri-gate pixel structure, comprising:
- a plurality of gate lines, arranged horizontally in parallel;
- a plurality of data lines, arranged vertically in parallel, with the plurality of gate lines and the plurality of data lines intersecting to define a plurality of sub pixel areas;
- and
- a first electrode line and a second electrode line, arranged vertically;
- wherein the plurality of sub pixel areas comprises a target sub pixel area in which a target sub pixel is disposed, and the target sub pixel area is bound by a first data line located on the left side of the target sub pixel and a second data line located on the right side of the target sub pixel;
- and
- wherein the first electrode line is disposed between the first data line and the target sub pixel, and the second electrode line is disposed between the second data line and the target sub pixel.
(canceled)
A display panel, comprising:
- a color film substrate, provided with a shading unit;
- and
- an array substrate, arranged opposite to the color film substrate, comprising a tri-gate pixel structure;
- a plurality of gate lines, arranged horizontally in parallel;
- a plurality of data lines, arranged vertically in parallel, with the plurality of gate lines and the plurality of data lines intersecting to define a plurality of sub pixel areas;
- and
- a first electrode line and a second electrode line, arranged vertically;
- wherein the plurality of sub pixel areas comprises a target sub pixel area in which a target sub pixel is disposed, and the target sub pixel area is bound by a first data line located on the left side of the target sub pixel and a second data line located on the right side of the target sub pixel;
- and
- wherein the first electrode line is disposed between the first data line and the target sub pixel, and the second electrode line is disposed between the second data line and the target sub pixel.
(canceled)
Dependencies are inferred from the claim text.