Non-planar transistor structures and methods of manufacturing thereof
AssigneeTokyo Electron Limited
InventorsEric Chih-Fang LIU, Subhadeep KAL, Peter WANG, Ying TRICKETT, Ya-Ming CHEN
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AssigneeTokyo Electron Limited
InventorsEric Chih-Fang LIU, Subhadeep KAL, Peter WANG, Ying TRICKETT, Ya-Ming CHEN
Estimating the term…
A method for fabricating semiconductor devices is disclosed. The method includes forming a first fin structure and a second fin structure in a first region and a second region of a substrate, respectively, wherein the first and second fin structure and the substrate comprise a first semiconductor material; forming a first liner structure and a second liner structure at least extending along sidewalls of the first fin structure and sidewalls of the second fin structure, respectively; replacing an upper portion of the second fin structure with a second semiconductor material, while leaving the first fin structure substantially intact; and exposing a top surface and upper sidewalls of the first fin structure, and a top surface and upper sidewalls of the second fin structure.
A semiconductor device, comprising:
A method for fabricating semiconductor devices, comprising:
A method for fabricating semiconductor devices, comprising:
Dependencies are inferred from the claim text.