Apparatus including selectable circuit placement mechanism and methods of manufacturing the same
AssigneeMicron Technology, Inc.
InventorsChin Hui Chong, Hong Wan Ng, See Hiong Leow, Ling Pan, Seng Kim Ye, Kelvin Tan Aik Boo
Life of this patent
Estimating the term…
Abstract
An apparatus includes selectable a circuit placement mechanism configured to support two or more different circuit layouts. The circuit placement mechanism may include an overlap of electrical connections associated with the two or more circuit layouts and joined through an etch back selector. The etch back selector may enable the apparatus to function according to a selected one of the two or more different circuit layouts.
Claims20
A method of manufacturing an apparatus, the method comprising:
- providing a multi-configuration substrate including a selectable circuit placement mechanism having a shared connection configured to provide electrical connections for two or more circuit placement configurations, the selectable circuit placement mechanism including an etch back selector configured to select from the two or more circuit placement configurations;
- selecting one of the two or more circuit placement configurations based on etching back a portion of the etch back selector;
- mounting a microcontroller on the multi-configuration substrate, wherein the mounted microcontroller is electrically coupled to the shared connection;
- mounting at least one memory device on the multi-configuration substrate;
- and
- electrically coupling the at least one memory device to the shared connection and the microcontroller.
A semiconductor package, comprising:
- a microcontroller;
- at least one memory device;
- and
- a substrate having the microcontroller and the at least one memory device mounted thereon, wherein the substrate includes:
- a substrate top surface;
- one or more unused contact surfaces exposed on the substrate top surface and unconnected to the microcontroller and the at least one memory device;
- active contact surfaces exposed on the substrate top surface and electrically connected to the microcontroller and the at least one memory device;
- internal electrical connections on or within the substrate and electrically coupling the active contact surfaces, the one or more unused contact surfaces, or a combination thereof;
- an etch back artifact including a conductive structure extending vertically above from the internal electrical connections toward the substrate top surface and buried under the top surface with a top portion of the etch back artifact unconnected;
- and
- a remaining selector portion exposed on the substrate top surface, wherein the remaining selector portion is connected to the internal electrical connections using a via.
A printed circuit board, comprising:
- a processor mounting portion configured to receive and provide electrical connections to a microcontroller;
- a memory mounting portion separated from the processor mounting portion and configured to receive at least one memory device;
- a first set of contact surfaces configured to support a first circuit placement configuration representative of having additional memory devices stacked over or under the microcontroller;
- a second set of contact surfaces configured to support a second circuit placement configuration representative of having the microcontroller unstacked and two or more stacked memory devices at the memory mounting portion;
- a first routing connection electrically connecting the first set of contact surfaces to the electrical connections configured to connect to the microcontroller;
- a second routing connection electrically connected the second set of contact surface and extending toward the first routing connection;
- and
- an etch back selector on a top surface of the printed circuit board, the etch back selector disposed between and electrically connecting the first and second routing connections, wherein the etch back selector is configured to selectively break a connection between the first and second routing connections using an etch back process to select between the first and second circuit placement configurations.
Dependencies are inferred from the claim text.