Semiconductor Packaging Method
AssigneeShenzhen Siptory Technology Co., Ltd
InventorDongdong Shao
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Abstract
The present invention relates to a semiconductor packaging method, comprising mounting a chip on a lead frame, and producing a wire end structure on an AL bonding pad on the upper surface of the chip using a lead bonding process; realizing modification of the AL bonding pad toward gold balls or copper balls to carry out subsequent packaging processes. The method can avoid the limitation of the wire bonding process on enhancing relevant performances of the product, and can avoid the complex and high-cost bonding pad modification or RDL process. The present invention further provides a packaging structure and packaging product obtained using the above method.
Claims15
A semiconductor packaging method, characterized in comprising:
- Step A. mounting a chip on a lead frame, and producing a wire end structure on an AL bonding pad on the upper surface of the chip using a lead bonding process;
- the wire end structure including a wire bonding pad contact ball, a transition connection platform, and a wire end, which are tightly connected from bottom to top;
- Step B. subjecting the lead frame whose wire end structure has been produced to first plastic packaging or compression encapsulation to realize full packaging of the chip and the wire end structure, with the top surface of the packaging layer being 20 to 50 μm higher than the top surface of the wire end structure;
- Step C. thinning the packaging layer until the wire bonding pad contact ball is exposed, removing the transitional connecting platform and the wire end;
- wherein a conducting wire used in the lead bonding process is a variable-diameter wire including more than N interconnected ball units, each of which includes a wire end part, a variable-diameter part, and a joint part, wherein the diameters of the wire end part and joint part are equal to the diameter of the conducting wire, and the variable-diameter part is larger in the middle and smaller at both ends, with the maximum diameter being 2 to 4 times the diameter of the conducting wire, and wherein Nis a natural number.
A semiconductor packaging structure, characterized in comprising a lead frame, a chip, and a packaging layer, wherein the chip is fixed on the lead frame, and the packaging layer encases the chip and the lead frame, wherein the upper surface of the chip is equipped with an AL bonding pad equipped with wire bonding pad contact balls that have had the wire end and transitional connecting platform removed, and wherein the wire bonding pad contact balls are electrically connected to surface bonding pads or surface circuits on the packaging layer through chip blind holes.
Dependencies are inferred from the claim text.