Multilayer ceramic capacitor
AssigneeMurata Manufacturing Co., Ltd.
InventorTomoaki HIRAI
Life of this patent
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Abstract
A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated on each other, and first and second external electrodes. The internal electrode layers include first and second internal electrode layers each respectively electrically connected to the first and second external electrodes. The first and second internal electrode layers include holes having different area equivalent diameters. A thickness of each of the dielectric layers is about 0.5 μm or more and (area equivalent diameter D99)<about 0.0879×exp(2.86×t) is satisfied.
Claims18
A multilayer ceramic capacitor comprising:
- a multilayer body including a plurality of dielectric layers that are laminated, a plurality of internal electrode layers that are each laminated on a corresponding one of the plurality of dielectric layers, a first main surface and a second main surface opposed to each other in a height direction, a first lateral surface and a second lateral surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction;
- and
- a first external electrode and a second external electrode;
- wherein
- the plurality of internal electrodes include a plurality of first internal electrodes each electrically connected to the first external electrode and a plurality of second internal electrode layers each electrically connected to the second external electrode;
- the plurality of first internal electrode layers and the plurality of second internal electrode layers each include a plurality of holes with different area equivalent diameters;
- when an area equivalent diameter at which a cumulative value in a cumulative distribution of the area equivalent diameters of the plurality of holes is about 998 is defined as an area equivalent diameter D99, and a thickness of each of the plurality of dielectric layers sandwiched between a corresponding one of the plurality of first internal electrode layers and a corresponding one of the plurality of second internal electrode layers is defined as a thickness t, the thickness t of each of the plurality of dielectric layers is about 0.5 μm or more and (area equivalent diameter D99)<about 0.0879×exp(2.86×t) is satisfied.
Dependencies are inferred from the claim text.