Alternating bitline page mapping with linear wordline ramping during a read operation
AssigneeMicron Technology, Inc.
InventorTomoharu Tanaka
Life of this patent
Estimating the term…
Abstract
Control logic in a memory device initiating a program operation to program a set of memory cells associated with a set of pages comprising a lower page, an upper page, an extra page, and a top page of a memory device. During the program operation, first data of the lower page and the upper page is programmed into a first subset of memory cells connected to a first subset of even-numbered bitlines associated with a target wordline of the memory device. During the program operation, second data of the extra page and the top page is programmed into a second subset of memory cells connected to a second subset of odd-numbered bitlines associated with the target wordline of the memory device.
Claims20
A memory device comprising:
- a memory array comprising a set of memory cells;
- and
- control logic, operatively coupled with the memory array, to perform operations comprising:
- initiating a program operation to program the set of memory cells associated with a set of pages comprising a lower page, an upper page, an extra page, and a top page of the memory device;
- causing, during the program operation, programming of first data of the lower page and the upper page into a first subset of memory cells connected to a first subset of even-numbered bitlines associated with a target wordline of the memory device;
- and
- causing, during the program operation, programming of second data of the extra page and the top page into a second subset of memory cells connected to a second subset of odd-numbered bitlines associated with the target wordline of the memory device.
A method comprising:
- initiating, by a processing device, a program operation to program a set of memory cells associated with a set of pages comprising a lower page, an upper page, an extra page, and a top page of a memory device;
- causing, during the program operation, programming of first data of the lower page and the upper page into a first subset of memory cells connected to a first subset of even-numbered bitlines associated with a target wordline of the memory device;
- and
- causing, during the program operation, programming of second data of the extra page and the top page into a second subset of memory cells connected to a second subset of odd-numbered bitlines associated with the target wordline of the memory device.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- initiating a program operation to program a set of memory cells associated with a set of pages comprising a lower page, an upper page, an extra page, and a top page of a memory device;
- causing, during the program operation, programming of first data of the lower page and the upper page into a first subset of memory cells connected to a first subset of even-numbered bitlines associated with a target wordline of the memory device;
- and
- causing, during the program operation, programming of second data of the extra page and the top page into a second subset of memory cells connected to a second subset of odd-numbered bitlines associated with the target wordline of the memory device.
Dependencies are inferred from the claim text.