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US 2024/0404586 A1Published application
Volatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsKi-Heung Kim, Taeyoung Oh, Hyongryol Hwang
Life of this patent
Estimating the term…
Abstract
A memory device includes a bank connected to a plurality of wordlines, a first global input and output (GIO) line, and a second GIO line formed to have a larger length than the first GIO line in a column direction. One of the first GIO line and the second GIO line may be allocated for metadata.
Claims20
A memory device comprising:
- a bank connected to a plurality of wordlines, a first global input and output (GIO) line having a first length in a column direction, and a second GIO line having a second length in the column direction, wherein the second length is larger than the first length,
- wherein one of the first GIO line and the second GIO line is allocated for metadata.
A memory device comprising:
- a bank connected to a plurality of wordlines, a first global input and output (GIO) line, and a second GIO line formed to have a larger length than the first GIO line in a column direction;
- and
- a row decoder connected to the plurality of wordlines, extending in the column direction, and configured to select the plurality of wordlines,
- wherein one of the first GIO line and the second GIO line is allocated for metadata.
1 more element
A memory device comprising:
- a bank comprising a plurality of subbanks divided in a column direction;
- a plurality of wordlines, each extending in a row direction and connected to the plurality of subbank;
- and
- a plurality of global input and output (GIO) lines extending in the column direction and connected to the plurality of subbanks,
- wherein the plurality of GIO lines comprise two GIO lines connected to different subbanks, and one of the two GIO lines is allocated for metadata.
2 more elements
Dependencies are inferred from the claim text.