Memory device using semiconductor element

A memory device using a semiconductor element, the memory device comprising:

• a first semiconductor region;
• a first impurity region placed on the first semiconductor region;
• a second semiconductor region extending in a vertical direction by being placed in contact with the first impurity region, with a surface of the second semiconductor region being concave in vertical section;
• a first gate insulating layer covering part of the second semiconductor region;
• a first gate conductor layer placed in contact with the first gate insulating layer;
• a second gate insulating layer formed along at least a recess in the second semiconductor region and provided with a concave-shaped vertical section;
• a second gate conductor layer formed inside a recess in the second gate insulating layer;
• and
• a second impurity region and a third impurity region each formed in contact with a top surface of a protrusion in the recess in the second semiconductor region;
• wherein
• a top surface of the second gate conductor layer is located at a lower position than top surfaces of the second impurity region and the third impurity region.