Display panel, display device and method of controlling display panel

A method of controlling a display panel, the display panel comprising:

• a base substrate, the base substrate comprising a display region and a peripheral region surrounding the display region;
• a plurality of sub-pixels located in the display region and arranged in a plurality of rows along a first direction;
• a plurality of gate lines located in the display region, wherein the plurality of gate lines extend along the first direction and are arranged along a second direction intersecting with the first direction, and each gate line is connected to at least one row of sub-pixels;
• a plurality of shift registers located in the peripheral region and configured to provide scanning signals;
• and a plurality of auxiliary circuits located in the peripheral region, wherein a first end of at least one gate line is connected to at least one of the plurality of shift registers and configured to receive the scanning signal provided by the at least one of the plurality of shift registers, and a second end of the at least one gate line is connected to at least one of the plurality of auxiliary circuits, wherein a control terminal of each auxiliary circuit is configured to receive an auxiliary signal, an input terminal of each auxiliary circuit is configured to receive a reference signal, an output terminal of each auxiliary circuit is connected to the second end of a respective gate line, and each auxiliary circuit is configured to provide the reference signal at the input terminal of the auxiliary circuit to the output terminal of the auxiliary circuit under control of the auxiliary signal,
• wherein the method comprises of respectively providing scanning signals to a plurality of rows of sub-pixels by a plurality of shift registers during a plurality of scanning periods, wherein each scanning period comprises a first period and a second period, wherein:
• in the first period, at least one of the plurality of shift registers provides a scanning signal to at least one row of sub-pixels among the plurality of sub-pixels through at least one gate line;
• and
• in the second period, at least one of the plurality of auxiliary circuits provides a reference signal to the at least one gate line under control of an auxiliary signal.