Processing-in-memory based accelerating devices, accelerating systems, and accelerating cards

Abstract

A processing-in-memory (PIM)-based accelerating device includes a plurality of PIM devices, a PIM network system configured to control traffic of signals and data for the plurality of PIM devices, and a first interface configured to perform interfacing with a host device. The PIM network system controls the traffic so that the plurality of PIM devices perform different operations, the plurality of PIM devices perform different operations in groups, or the plurality of PIM devices perform the same operation in parallel.

Dependencies are inferred from the claim text.